Atomically Flat Tunnel Transistor Overcomes Fundamental Power Challenge of Electronics
December 8, 2015 | University of California - Santa BarbaraEstimated reading time: 4 minutes
One of the greatest challenges in the evolution of electronics has been to reduce power consumption during transistor switching operation. In a study recently reported in Nature, engineers at University of California, Santa Barbara, in collaboration with Rice University, have demonstrated a new transistor that switches at only 0.1 volts and reduces power dissipation by over 90% compared to state-of-the-art silicon transistors (MOSFETs).
MOSFETs have been the building blocks of everyday electronic products since the 1970s. However, to sustain the ever-growing need for increased transistor densities, miniaturization of MOSFETs has given rise to a power dissipation challenge due to the fundamental limitations of their turn-on characteristics.
"The steepness of a transistor's turn-on is characterized by a parameter known as the subthreshold swing, which cannot be lowered below a certain level in MOSFETs," explained Kaustav Banerjee, Professor of Electrical and Computer Engineering at UC Santa Barbara. A minimum gate voltage change of 60 millivolts at room temperature is required to change the current by a factor of ten in MOSFETs. In essence, the existing state of transistor technology limits the energy efficiency potential of digital circuits in general.
The research group of Professor Kaustav Banerjee at UC Santa Barbara took a new approach to subverting this fundamental limitation. They employed the quantum mechanical phenomenon of band-to-band tunneling to design a tunnel field effect transistor (TFET) with sub-60mV per decade of subthreshold swing.
"We restructured the transistor's source to channel junction to filter out high energy electrons that can diffuse over the source/channel barrier even in the off state, thereby making the off state current negligibly small," explained Banerjee. At UCSB, Banerjee's Nanoelectronics Research Lab includes Deblina Sarkar, Xuejun Xie, Wei Liu, Wei Cao, Jiahao Kang, and Stephan Kraemer, as well as Yongji Gong and Pulickel Ajayan of Rice University.
Banerjee and his colleagues are motivated by a global electronics industry that loses billions of dollars each year to the impact of power dissipation on chip cost and reliability. "This translates into lower battery lifetime in personal devices like cell phones and laptops, and massive power consumption of servers in large data centers," adds Banerjee, pointing out the global scale of this energy demand.
Page 1 of 2
Suggested Items
Material Insight: The Dielectric Constant of PCB Materials
05/17/2024 | Dr. Preeya Kuray -- Column: Material InsightIn the world of PCB design, miniaturization can be achieved by using low dielectric constant (Dk) materials. Low Dk materials can allow for a reduction in thickness while maintaining a given trace width, leading to lower transmission loss and higher density circuitry.
IPC APEX EXPO: Some Thoughts About Growth
05/16/2024 | Dan Feinberg, I-Connect007After two and a half days of wandering the aisles at IPC APEX EXPO 2024, for the first time, I almost felt like I was exploring CES. There were so many booths and exhibits that I could describe, but I’d like to focus on the growth and huge value of this event, which has expanded well beyond just the growing and impressive exhibit show floor.
The Shaughnessy Report: Unlock Your High-speed Material Constraints
05/15/2024 | Andy Shaughnessy -- Column: The Shaughnessy ReportThe world of PCB materials used to be a fairly simple one. It was divided into two groups: the “traditional” laminates, often called FR-4, and the high-speed laminates developed especially for high-speed PCBs. These were two worlds that usually didn’t collide. But then traditional laminates started getting better, and high-speed designers and design engineers took notice and started to reconsider what FR-4 could be used for.
Breaking High-speed Material Constraints: Design007 Magazine — May 2024
05/14/2024 | I-Connect007 Editorial TeamDo you need specialty materials for your high-speed designs? Maybe not. Improvements in resins mean designers of high-speed boards can sometimes use traditional laminate systems instead of high-speed materials, saving time and money while streamlining the fab process. In the May 2024 issue of Design007 Magazine, our contributors explain how to avoid overconstraining your materials when working with high-speed boards.
Indium Experts to Present at Electronics in Harsh Environments SMTA Conference
05/13/2024 | Indium Corporationndium Corporation Technical Manager for Europe, Africa, and the Middle East, Karthik Vijay, will deliver a technical presentation and Indium Corporation Senior Technologist, Dr. Ronald Lasky, will deliver both a workshop and technical presentation at the Electronics in Harsh Environments SMTA Conference on May 14-16 in Copenhagen, Denmark.