The Bare (Board) Truth: My Top Six Design Challenges

Greetings! This month, I’m offering my top six design challenges, with some additional feedback from Jeff Reinhold, one of the owners at Monsoon Solutions.

Narrowing it down to the top six was tough, because there are so many challenges for today’s board designers—from incomplete information and footprint generation to power routing constraints. These are just some of my thoughts and is by no means a complete list of all of today’s design challenges. Every designer has his or her own challenges; what is easy for some may be a challenge to others. I will be interested in reading the different approaches to this topic. Here’s my countdown:

#6: Inaccurate or Less Than Helpful App Notes or Part PDFs
As a board designer we are constantly referring to component datasheets and app notes for information helpful to layout and design. Many of these datasheets are very short and do not have enough information regarding device layout; they may have some technical app notes and a pinout but little information other than that relative to board design. Even worse, some are over 300 pages long, and most of the information is more relevant to an EE than to a board designer, thus requiring the designer to weed through the mountain of data to glean what they really need.

In my short time as a board designer, I have seen both. Many do show layout solutions and design suggestions, but some are not really the best way to place the parts such as resistors and capacitor location suggestions. So why are these datasheets so often misleading or less than helpful? Here are some possible reasons:

  • Understanding that everything is application-based and the engineer writing these app notes cannot possibly cover every contingency plan or every possible application.

  • There may be left out or missing information. Here you should seek a second or third source to find the information you need.

  • Misprinted information. This one is quite common. Frequently the datasheet itself was translated from its original language and as we all know, this can result in sentences that make no sense, with some that are downright hilarious.

  • There could be measured data that was misinterpreted and therefore useless to anyone looking to use that information.

Due diligence on the part of the designer is always required. Know what you want, what your customer wants, and how to get it. This requires amassing information about your design’s purpose.

At Monsoon Solutions, we do this in a “kick-off” meeting with the customer to ask specific questions. We cover things like power needs, mechanical constraints, fixed components, and thermal considerations, just to name a few, Even the best laid plans do not always cover everything you need to know about your design in the kick-off meeting, and follow-up conversations are usually necessary. Do not be afraid of asking more questions (within reason) to get your design right.

I also encourage you to learn and read more. Of course, be careful not to believe everything you read, either online or in print. Testing everything you read to prove the concept to yourself sometimes means you will also have to prove it to the customer. Be ready for that.

#5: Large PMICs
A power management IC is a power IC solid-state component that distributes the required measure of voltage to all other parts, which is usually accomplished using a low on-resistance MOSFET placed between the source and the load. The PMIC controls the MOSFET and thus its resistance. The PMIC manages the turn on/off rate by timing these MOSFETS, one per rail. It’s typically used in battery operated devices such as cellphones, laptops, and portable media players to decrease the amount of space required due to limited board real estate.

C_Thompson_Jeff_Reinhold.jpgAbout this, Jeff Reinhold said:

“The reason I put PMICs above other circuits is we typically get a lot of information on how to lay out certain circuits (not just PMICs), including impedance, length, matching, clearance, and placement info. In addition, there may be pictures of completed placement/routing and even reference boards. The more complicated the circuit, the more information we might get. Very often, the parts and connections we have don’t match the input(s) exactly. It may just be that parts are sized differently, but very often the circuit is slightly different as well.

“For anything that isn’t a large PMIC, if I follow the input well, there is a good chance I won’t have to change anything after it gets reviewed and/or simulated. If I do, it’s typically minor. That has never happened with a large PMIC (small ones are easier to get right on the first try). I had one instance where I was able to follow the reference/input very closely and I thought it would be good, but it still needed some difficult work to get it right. Adding or moving caps and trying to squeeze more copper area or vias is often not easy to do in crowded areas.”

#4: ‘Scale’ or Available Space for Design
Many times as designers, we run into restrictions on available space and board real estate issues, based on a number of things, such as the number and size of components needed for a given design. I can tell you that looking at the available space where all the components are to be placed, and then looking at the extent of the board itself, can be daunting on some very small boards; remember that most boards (without having to go to truly embedded components to minimize de-coupling caps, for instance) only have their external layers available to be populated with components.

In many cases the customer may not want any components on one side or the other, further limiting the available space. Perhaps the back side must lay flat against another board.

Components cannot be simply placed wherever they fit on a given design—for example, bypass caps that need to be as close to the power pin they are associated with. In a low frequency/DC context, a bypass cap opposes changes in the voltage line by charging or discharging. The capacitor functions like a low impedance battery that can supply small amounts of transient current. In a high frequency context, the capacitor is a low impedance path to ground that protects the IC from high-frequency noise on the power line.

Consider also trace and space limitations based on power functions: The greater the power the greater the voltage; this requires wider tracks that also eat up board area.

Assembly also eats up board space. Auto insertion devices can place components extremely accurately, but they still require enough room to operate in. In addition, parts that cannot be placed by automated placement equipment must be hand placed, requiring additional space for the technician and access to get his or her fingers (or tools) within. An example would be devices such as switches or connectors. Additional space is also required for de-bugging or reworking by the technician.

IPC has some great information on guidelines for space such as IPC 2221B—the spec that deals with design—and it has solid information on voltage spacing and other electrical considerations.

  • IPC-A-610: This is the generic acceptability/rejection spec and covers how hardware is to be assembled onto PCBs.

  • IPC 7351B: This is the land pattern spec for surface mount parts with details on pad size and spacing pertaining to PCB design.

Finally, test—namely test point access—must also be considered. There needs to be enough room to probe the test points.

#3: Information Not Initially Covered by the Customer and Changes on the Fly
This one is inevitable and generally happens after the board has gone back to the customer for part placement and/or final route review. It might be information either not shared by the customer in the kick-off meeting or information you as the designer did not ask about. Frequently, previously unforeseen things pop up and need to be dealt with. Additionally, there may be some feedback from different engineers on the project; mechanical and power engineers may have different ideas on what they would like to see or imagine they would like to see from the design. More on this topic later.

In conjunction, there may be physical changes that the customer may require, such as new components due to part availability or part obsolescence. This one is quite common as components can be hard to find and a substitute must be used. It is the board designers’ responsibility to incorporate these changes with a minimal effect and loss of time.

#2: Requests for Things that ‘Don’t Play Well Together’
What I mean by this is things like small/tight pitch BGAs with high copper for high current. Sometimes the customer wants things that are just not possible from either a design or fabrication standpoint; for example, three- or four-ounce finish with 0.003”/0.003” trace and space, or very tight pitch components with space not adequate between SMD pads to be able to have higher copper. These both happen frequently and must be leveraged to have a good design solution.

Those of you who have read my columns when I worked in board fabrication know this is something I feel strongly about and is a bit of a soapbox for me. Even 0.003”/0.003” trace and space on a half-ounce foil to start can be a fabricator limitation. Some fabricators will then ask to start on one-quarter or 3/8th-ounce foil to be able to deal with the trace and space that low, remembering that starting on even a half-ounce will require a half-mil etch compensation, taking the space down to 0.0025”. At this point, most fabricators require starting on the lighter copper weights of either quarter or 3/8 ounce. These are such light copper weights that most fabricators’ etchers can easily etch that thinness of metal without an additional etch compensation digging into the available space.

Finally, by far the most important…

#1: Reading Our Customers’ Minds
About this, Jeff Reinhold said:

“We often have many inputs to deal with. Some are more difficult to decipher than others, but if they are available, we can read them. What we can’t read is our customer’s minds. When we get right down to it, this is what our job is—create data that can be used to build a circuit board, and that meets or exceeds our customer’s expectations for how that should be implemented (i.e., read the customer’s mind). I used to say that there are 500 ways to lay out a board and all of them will work, but only one of them fits what is in the customer’s head. That is still true but now the number is probably more like 20 than 500.”

In short, good design makes a product useful. It has to satisfy certain criteria—not only the functional, but also the psychological and aesthetic. Good design emphasizes the usefulness of a product while disregarding anything that could possibly detract from it.

Jeff continues:

“Our customers invariably have some picture in their head (or collective heads) of what they think the layout should be or will look like. Not only do we have to figure out what that is, via additional conversations or use of the tools at our disposal, we must balance that with our own knowledge of best practice for the given circuit and our customer’s ideas on implementation, and then be able to create something that meets their expectations, even if it must be something different than what they thought it would be.”

Jared Spool, the American writer, researcher and usability expert, said:

“Good design when it’s done well, becomes invisible. It’s only when it’s done poorly that we notice it.”[1]

Another favorite quote about design comes from Steve Jobs:

“Design is not just what it looks like and feels like. Design is how it works.”[2]

But my favorite quote comes from “Wind, Sand and Stars” by Antoine de Saint-Exupéry:

“A designer knows he has achieved perfection not when there is nothing left to add, but when there is nothing left to take away.”[3]

References

  1. Lesson From A Good Bad Design.
  2. “The Guts of a New Machine,” The New York Times Magazine, Nov. 30, 2003.

  3. “Land of Men,” Antoine de Saint- Exupéry, 1939.

This column originally appeared in the May 2021 issue of Design007 Magazine.

 

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2021

The Bare (Board) Truth: My Top Six Design Challenges

05-19-2021

Narrowing it down to the top six was tough as there are so many challenges for today’s board designers—from incomplete information and footprint generation to power routing constraints. These are just some of my thoughts and is by no means a complete list of all of today’s design challenges.

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2020

The Bare (Board) Truth: Via Basics

11-13-2020

In this month’s column, Mark Thompson addresses what vias are and what they are used for, as well as how they are used in PCB design. He also covers some criteria on pad size vs. via size for fabrication and how vias came about.

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The Bare (Board) Truth: 5 Questions About Improving Thermal Management

09-10-2020

Mark Thompson from Monsoon Solutions answers five questions about thermal management at the design and PCB levels, including how much heat a via dissipates, how to identify potential thermal issues, and more.

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The Bare (Board) Truth: ‘The Want of a Nail’ and the Butterfly Effect

02-17-2020

After exploring the Todd Rundgren song "The Want of a Nail" and the butterfly effect, Mark Thompson explains how small changes in design characteristics that happen at a PCB fabrication level can have larger consequences for the final product.

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2019

The Bare (Board) Truth: Teaching the Next Generation—An Overview of Today’s University Courses

09-05-2019

In this column, Mark Thompson focuses on the University of Washington, where he counted approximately 163 programs in their catalog of electronics courses. He shares the top 19 courses he thinks are the most valuable for emerging electronic engineers if he were to start his electronics career over again.

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The Bare (Board) Truth: Fabrication Starts With Solid Design Practices

06-20-2019

It’s a fact: Great board design is the key to a great PCB. I’m even more certain of this after spending two days in a wonderful class presented by Rick Hartley titled “Control of Noise, EMI, and Signal Integrity in High-speed Circuits and PCBs.” Several times during Rick’s presentation, I wanted to slap myself in the forehead and say, “I should have had a V-8!”

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Board Negotiations: Design Rules and Tolerances

06-03-2019

Here are several examples of how a PCB fabricator can deal with various tolerances. Let’s look at “press fit” applications for tool sizes. Typically, a given plated hole or slot is ±0.003” and a typical non-plated hole or slot is ±0.002”. So, what does the fabricator do when a plated hole is called out as ±0.002”? The simple answer is to calculate how much plating there will be in the hole barrel, and then over-drill to accommodate the ±0.002 tolerance.

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The Bare (Board) Truth: Eliminate Confusion

03-18-2019

This column will address eliminating confusion that creates remakes both from the end-user/designer and the fabrication house. Let’s say you’ve asked for a material type on your drawing that is not either readily available or used by your fabricator. Here, you should expect the fabrication house to respond quickly and have all the deviations at once for you to review. This includes any impedance width changes, material types, or copper weights to produce the part. Any deviations regarding drawing notes such as wrap plate requirements that cannot be incorporated due to insufficient space or the extra etch compensation to meet the wrap plate requirement should also be addressed.

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2018

The Bare (Board) Truth: Getting on the Same Page—A Data Story

11-26-2018

Thickness callouts for single-sided or double-sided orders are even more critical. As a fabricator, we can control the thickness of the multilayer by using different combinations of prepregs/cores. If a customer calls out a single-sided or double-sided job as 0.008”, is this the core dielectric or an overall dielectric? If 0.008” represents the core dielectric callout on a 2-ounce finished part, the final thickness would be closer to 0.013”. If the callout for 0.008” pertains to the overall finished thickness, we would need to start at a 0.004” core to finish at approximately 0.009” after plate, surface finish, and mask.

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The Bare (Board) Truth: Refining Output Data Packages for Fabricators

05-02-2018

One of the biggest issues PCB fabricators face is the completeness (or incompleteness) of the data output package we receive from customers on a new PCB. In this column, I am going to present what is needed, from a fabricator’s perspective, for a good output package and why.

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2016

The Bare (Board) Truth: Hey, They’re Just Vias—or Are They?

11-28-2016

I get this phone call once a week: “Mark, what is the smallest mechanical via that can be done by your company?” I reply, “What will the tolerance for the vias in question be?” If they say, “Oh, your standard +/-.003” tolerances,” I must tell them the min via would be around .0078” with a signal pad of at least .014” and an anti-pad of at least .018”. What if they don't have that kind of room?

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The Top 10 Ways Designers Can Increase Profits

04-19-2016

Can you truly increase profitability through PCB design practices? Mark Thompson believes you can. And it starts with a philosophy that embraces DFM techniques. Then you must be ready for the initial release to a fabricator by ensuring that you are communicating all of your specifications and needs clearly to the fabrication house so that you get an accurate quote. Let’s dive in, starting with Number 10 and working our way to the most important way a designer can increase company profits.

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2015

The Do’s and Don’ts of Signal Routing for Controlled Impedance

06-10-2015

In this column, we will once again be focusing on controlled impedance structures, both from the layout side and the simulation side. I will break them down into the sub-categories of the models they represent and the important points to remember when using the various models. I will also be asking questions such as, “Why would a fabricator ask for a larger impedance tolerance?” and “Where does the fabricator draw the line for controlling various structures?”

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The Bare (Board) Truth: Tips for Getting the Boards You Need

05-22-2015

This column is about meeting each customer's needs. Some customers' requirements are as simple as a specific definition for a fiducial size, rail tooling, or orientation feature, while other customers may require special processes. Mark Thompson offers fabricator tips that can help designers get the boards they need.

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What Will 2015 Bring?

02-25-2015

I’ve been thinking over what 2015 might look like, from my point of view at a PCB fabrication company. Let me first start out with some broad overviews of trends from 2014 that I see continuing. On my end, I certainly expect to see more RF work, more hybrid analog-digital PCBs, and more surface finishes for lead-free assemblies. And that’s just the tip of the iceberg.

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2014

Understanding the Typical CAM Process

03-19-2014

Not all board fabricators have the ability to have both CAD and CAM. You may say to yourself, "But a CAM tool should be able to do some, if not all, CAD functions," and that is true; but if you are really getting to the design level, you need to have a design team.

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The Bare (Board) Truth: Understanding the Typical CAM Process

03-19-2014

Not all board fabricators have the ability to have both CAD and CAM. You may say to yourself, "But a CAM tool should be able to do some, if not all, CAD functions," and that is true; but if you are really getting to the design level, you need to have a design team.

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2013

Qualifying Your Fabricator: Identifying Winners (and Losers)

12-24-2013

Columnist Mark Thompson writes, "Based on today's board complexities, a review should be done prior to quote to make sure no manufacturing issues occur. This is critical when it comes to things like minimum pre-preg interfaces on high-copper coil boards or jobs with unique reference planes for various impedance scenarios."

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The Bare (Board) Truth: Qualifying Your Fabricator - Identifying Winners (and Losers)

12-24-2013

Columnist Mark Thompson writes, "Based on today's board complexities, a review should be done prior to quote to make sure no manufacturing issues occur. This is critical when it comes to things like minimum pre-preg interfaces on high-copper coil boards or jobs with unique reference planes for various impedance scenarios."

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A PCB Design Potpourri

10-16-2013

In this column, Mark Thompson revisits topics covered in some of his previous columns and fleshes them out with new, updated information. Thompson says, "In this job, I truly learn something every day, and I'm happy to share a few notable nuggets with you."

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2012

The Bare (Board) Truth: I'm From CAM and I'm Here to Help

12-12-2012

In this column, Mark Thompson shows that fabricators are not necessarily meddling in your design; some of them really do want to help make your board right the first time. And he also demonstrates how patience and perseverance can go a long way with a customer!

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The Bare (Board) Truth: Tales From the Fab Shop

05-16-2012

Designers continue to create the same-net spacing violations when relying on autorouters. Surface features connected elsewhere on an internal plane may have copper pour too close to other metal features. Electrically it doesn't matter whether these features bridge, but for most fabricators, any sliver thinner than 0.003" has the potential to flake off and redeposit elsewhere. By Mark Thompson.

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Design to Fab: Making it Work

03-30-2012

A very large customer sent us two 4-layer boards riddled with differential pairs, with no information about any controlled impedances or specific dielectrics. When we asked if these were to be controlled, the customer was most appreciative and realized that some mention of the impedances, threshold and tolerance should have been made initially. When in doubt, talk to the customer!

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Mark Thompson: IPC APEX EXPO Wrap-Up

03-07-2012

It was a mostly sunny week in San Diego, where IPC APEX EXPO returned after a long absence. I thought the San Diego Convention Center was a great choice for a venue. And this year, the engineers and designers on the show floor were looking at new processes and technologies like kids in a candy store.

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2011

The Bare (Board) Truth: Slow Down and do it Right

09-21-2011

You may be tempted to cut corners in an effort to stay on schedule. But cutting corners to save time does not save anything if it results in a new rev. Let's talk about the risks associated with assuming your board house will find and be able to correct errors in your designs. You'll avoid most of these if you slow down and do it right!

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The Bare (Board) Truth: Four Common Fabrication Questions

08-03-2011

A few months ago, I covered the "10 Most Common Fab Misconceptions." In this column, I will take a similar approach and address four of the most common fabrication questions that I hear. These same questions keep popping up, over and over. But I believe I can dispel the myths surrounding these challenges, and explain their solutions.

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The Bare (Board) Truth: Scene and Heard at IPC APEX EXPO

06-01-2011

I'm always amazed at the diversity of people I see while people-watching in Vegas. And this year, we saw a great diversity of new products and processes at APEX. Some were new combinations of older technologies, while others addressed problems in a completely new, different way.

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2010

The Bare (Board) Truth: Netlist Mismatches Redux

12-01-2010

Let's start by clarifying the intent of the netlist compare. I still get requests to just "generate a netlist" based on the customer's Gerbers. As I have said, since the intent of a netlist compare is to compare the design criteria against the exported Gerber files, this would never find a mismatch.

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RoHS for Fabricators and Designers: Fact and Fiction

11-03-2010

Most of you have heard of the European Union's RoHS directive. Some people mistakenly think it's mainly an assembly problem. But how, exactly, does RoHS pertain to PCB fabricators and designers? Is RoHS-compliant the same as RoHS-compatible?

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Timing is Everything in Controlled Impedance Fabrication

07-20-2010

According to Mark Thompson, timing can make or break your controlled impedance board. With many jobs going through turnkey environments, late communication about impedance issues takes valuable time out of the fabrication process and can delay delivery of product, leaving the end-user and the turnkey assembler unhappy.

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The Bare (Board) Truth: How to Qualify Your Fabricator

06-16-2010

This column is written from the viewpoint of you, the customer. What should you look for when qualifying a fabricator? Sure, you want the company to be IPC Class 3 6012 capable and ISO-certified, and you may need them to be ITAR-certified as well. But what other criteria can help you separate the wheat from the chaff, so to speak?

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Impedance Lines: Keep Them on the Inside

03-02-2010

Keeping those impedance-controlled lines on the inside layers of a circuit board is a great idea for a number of reasons. Let's start with the facts: You'll make your fabricator and your customer very happy by remembering to keep them on the inside.

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2009

More CAM Edits Revealed!

11-24-2009

A typical CAM department makes numerous edits prior to fabrication. Today, I will elaborate on inner-layer feature CAM edits, including the addition of flow and starburst patterns and constraints for scored jobs, as well as the process for fabricating edge-plated features.

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The Bare (Board) Truth: What Happens to Your CAM Files?

07-22-2009

What does the CAM department do to your files and what does that mean to you? The following is a brief synopsis of the edits that are likely to be performed at CAM prior to fabrication.

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The Bare (Board) Truth: Basic Impedance Fab Guidelines, Part 1

06-10-2009

When we talk about signal integrity or impedance lines, there are some very basic guidelines to follow. Remember, impedance mismatches cause signal reflections, which reduce voltage and timing margins.

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