Ansys Joins Intel Foundry Services’ Design Ecosystem Alliance as an Inaugural Member
February 10, 2022 | ANSYSEstimated reading time: 1 minute
Ansys announced its inaugural partnership to IFS Accelerator – EDA Alliance to provide best-in-class EDA tools and simulation solutions that will support customer innovation, including bespoke silicon for customizable three-dimensional integrated circuit (3D-IC) designs.
By leveraging Ansys’ market-leading multiphysics solutions, IFS Accelerator will make silicon technology available to customers to design uniquely innovative chips. Ansys’ cutting-edge EDA and simulation tools will enable mutual customers to reduce design barriers, minimize design risk and cost, and accelerate time-to-market.
The IFS Accelerator will foster collaborative innovation with world-leading EDA, design services and IP partners to provide a comprehensive design ecosystem with premium process technologies, advanced packaging technologies, and manufacturing capabilities.
“We are excited to announce the IFS Accelerator – EDA Alliance as a major step forward for Intel's foundry ambitions,” said Rahul Goyal, VP and GM of Intel Product & Design Ecosystem Enablement. “Together with Ansys and other partners, this alliance will create advanced flows and methodologies, and accelerate productivity by combining our knowledge, resources, and shared passion to drive electronic design.”
The advanced packaging technologies allow multiple chips to be placed together within system-in-package (SiP) designs for greatly increased capacity, performance, and flexibility. This leads to completely new kinds of integrated systems.
“IFS is built to help meet the growing global demand for semiconductors. Ansys is a proud supporter of the semiconductor industry,” said John Lee, vice president and general manager of the electronics and semiconductor business unit at Ansys. “It is also a privilege to partner with IFS as one of the leading EDA vendors in its newly formed alliance. We meet this opportunity with enthusiasm and offer our unwavering support to enable our customers to access silicon technology to design with innovation.”
Suggested Items
Real Time with… IPC APEX EXPO 2024: My Role as a Technology Solutions Director
05/02/2024 | Real Time with...IPC APEX EXPOPeter Tranitz, senior director of technology solutions at IPC, shares insights into his role as the design initiative lead. He details his advocacy work, industry support, and the responsibilities of the design initiative committee. The conversation also covers the revamping of standards, the IPC Design Competition, and the implementation of design rules in software tools.
Real Time with… IPC APEX EXPO 2024: Ventec Discusses New Pro-bond Family of Advanced Products
05/01/2024 | Real Time with...IPC APEX EXPOChris Hanson, Ventec's Global Head of IMS Technology, outlines the launch of four pro-bond formulas that deliver an outstanding combination of low dissipation factor (Df) with a dielectric constant (Dk) range to maximize the design window for critical PCB parameters. As Chris points out, Pro-bond is designed for low-loss, high-speed applications, while thermal-bond dissipates heat from a component through the board to a heat sink.
IPC's Vision for Empowering PCB Design Engineers
04/30/2024 | Robert Erickson, IPCAs architects of innovation, printed circuit board designers are tasked with translating increasingly complex concepts into tangible designs that power our modern world. IPC provides the necessary community, standards framework, and education to prepare these pioneers as they explore the boundaries of what’s possible, equipping engineers with the knowledge, skills, and resources required to thrive in an increasingly dynamic field.
On the Line With… Talks With Cadence Expert on SI/PI for PCB Designers
05/02/2024 | I-Connect007In “PCB 3.0: A New Design Methodology—SI/PI for PCB Designers,” subject matter expert Brad Griffin, Cadence Design Systems, discusses how an intelligent system design methodology can move some signal and power integrity decision-making into the physical design space, offering real-time feedback.
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.