3D Electromagnetic Analysis
August 22, 2023 | Yuriy Shlepnev, SimberianEstimated reading time: 1 minute
Data rates in PCB interconnects are increasing in all signaling protocols (PCIe, DDR, GDDR, Ethernet, USB, SAS, InfiniBand, CEI, OIF, 5G). Most of those high-speed signaling standards have one-lane data rates over 6 Gbps (GT/s) and some up to 112 Gbps with signal spectrum in microwave and even millimeter wave bandwidths. Design of compliant interconnects at these data rates cannot simply rely on geometrical rules or rules of thumb. Signal distortion by reflections, dissipation and crosstalk can cause interconnect performance degradation or even failure. To avoid it, signal integrity compliance analysis and possible interconnect optimization is required.
Our software provides 3D electromagnetic analysis of PCB and packaging interconnects. It can be used for pre-layout design (stackup exploration, via hole design) and post-layout interconnect compliance analysis and optimization. Simbeor ensures the accuracy of the models by using advanced algorithms for 3D full wave analysis, benchmarking, and experimental validation. Simbeor and the “sink or swim” interconnect design process remove all uncertainties and guarantee the first pass design success. Most importantly, it lets you solve electromagnetic signal integrity problems at a relatively low cost and with extreme ease. You don't need to be an expert in signal integrity or have a PhD in electromagnetics to use it.
The first version was introduced in 2007. It was the first electromagnetic tool designed specifically for PCB designers and signal integrity engineers. Since then, its evolution is a chain of innovations in interconnect analysis and validation. In the past three years, with the major part of the work completed in "self-isolation," our team has elevated the tool to a new level.
Our software development kit was introduced for design exploration, machine learning, and for possible integration into other tools. Post-layout geometry processing, visualization and model building were accelerated orders of magnitude. Electromagnetic analysis was also accelerated orders of magnitude with the domain decomposition technique. We had enough time—there were very few distractions—and sufficient expertise to re-think and re-design the post-layout process, making it suitable not only for SI engineers, but for any PCB designer.
To read this entire article, which appeared in the August 2023 issue of Design007 Magazine, click here.
Suggested Items
iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging
04/26/2024 | iNEMIAdvanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.
Cadence, TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
04/25/2024 | Cadence Design SystemsCadence Design Systems, Inc. and TSMC have extended their longstanding collaboration by announcing a broad range of innovative technology advancements to accelerate design, including developments ranging from 3D-IC and advanced process nodes to design IP and photonics.
Ansys, TSMC Enable a Multiphysics Platform for Optics and Photonics, Addressing Needs of AI, HPC Silicon Systems
04/25/2024 | PRNewswireAnsys announced a collaboration with TSMC on multiphysics software for TSMC's Compact Universal Photonic Engines (COUPE). COUPE is a cutting-edge Silicon Photonics (SiPh) integration system and Co-Packaged Optics platform that mitigates coupling loss while significantly accelerating chip-to-chip and machine-to-machine communication.
Siemens’ Breakthrough Veloce CS Transforms Emulation and Prototyping with Three Novel Products
04/24/2024 | Siemens Digital Industries SoftwareSiemens Digital Industries Software launched the Veloce™ CS hardware-assisted verification and validation system. In a first for the EDA (Electronic Design Automation) industry, Veloce CS incorporates hardware emulation, enterprise prototyping and software prototyping and is built on two highly advanced integrated circuits (ICs) – Siemens’ new, purpose-built Crystal accelerator chip for emulation and the AMD Versal™ Premium VP1902 FPGA adaptive SoC (System-on-a-chip) for enterprise and software prototyping.
Listen Up! The Intricacies of PCB Drilling Detailed in New Podcast Episode
04/25/2024 | I-Connect007In episode 5 of the podcast series, On the Line With: Designing for Reality, Nolan Johnson and Matt Stevenson continue down the manufacturing process, this time focusing on the post-lamination drilling process for PCBs. Matt and Nolan delve into the intricacies of the PCB drilling process, highlighting the importance of hole quality, drill parameters, and design optimization to ensure smooth manufacturing. The conversation covers topics such as drill bit sizes, aspect ratios, vias, challenges in drilling, and ways to enhance efficiency in the drilling department.